1. Field
The present invention relates generally to a transistor and more particularly to a method and an apparatus for forming multiple connections to a transistor for reduced gate (FET/HEMT) or base (BJT/HBT) parasitics, and improved multi-finger transistor thermal impedance.
2. Description of Related Art
A transistor is a semiconductor device used to amplify or switch electronic signals and power. Thus, a function of a transistor is its ability to amplify a small signal to a larger signal. Alternatively, another function of a transistor is its ability to serve as a switch to turn current on or off.
Generally, there are two types of transistors. A bipolar junction transistor (BJT) has terminals labeled base, collector, and emitter. A current flowing from the base to the emitter controls (or switches) a larger current between the collector and the emitter. A heterojunction bipolar transistor is a form of a BJT that incorporates a hetero junction that uses two different materials, with different band gaps, for one or both junctions. A field effect transistor (FET) has terminals labeled gate, drain, and source. A voltage at the gate controls a current between the drain and the source. A high electron mobility transistor (HEMT) is a form of FET that incorporates a hetero junction that uses two different materials, with different band gaps, on either side of the channel. Typically, a HEMT provides low noise figure and high levels of performance at microwave, mm-wave and sub-mm-wave frequencies. Typically a HBT provides higher gain and a larger operating voltage for performance at microwave, mm-wave, and sub-mm-wave frequencies. Thus, HEMT and HBT technologies are widely used in RF designs where high performance is required at high RF frequencies.
Thus, it is advantageous for a transistor to generate higher transistor bandwidths and higher output power. However, increasing transistor bandwidths requires reductions to the device parasitics to reduce transit delays and increase gain. Device parasitics decrease the speed at which a transistor operates and how much power the transistor can dissipate. The configuration of a transistor strongly influences how much heat it generates for a given power dissipation. Significant challenges exist when scaling the gate resistance and inductance of a FET (or HEMT) or the base resistance and inductance of a BJT (or HBT) because the physical dimension associated with the gate feed resistance and inductance, or the base metal resistance and inductance, can change little. Moreover, physical scaling of the transistor increases the power handling demands it must support before thermal effects degrade its RF performance. The limited physical dimensions associated with the gate feed resistance and inductance, or the base metal resistance and inductance, effectively sets an upper limit to the higher device bandwidth and/or gain achievable for a given technology.